So-called limiter receiver structures are used for outlay-favorable implementation of receivers for frequency- or phase-modulated signals with a constant envelope such as, for example, GFSK (Gaussian Frequency Shift Keying) signals. The functional principle of a limiter receiver structure is based on the fact that the essential portion of the information of a frequency- or phase-modulated signal lies in the frequency or the phase and thus in the zero crossings of the signal. The analog-to-digital conversion of the reception signal is effected in a limiter receiver structure by means of a threshold value decision (which is performed by the limiter) and a subsequent sampling of the value-discrete time-continuous rectangular signal output by the limiter. Since the entire useful information of the signal lies in the zero crossings in the signal path downstream of the limiter, a high sampling rate Tz−1 is necessary in order to detect the zero crossings with the necessary accuracy. In order to avoid, during the sampling, spectral overlaps (aliasing) of higher harmonic spectral components and thus extinction of information, the sampling rate Tz−1 has to be chosen to be significantly greater than the bandwidth B of the signal received by the limiter. In other words, the minimum sampling rate required from the standpoint of information theory (said rate being determined by the bandwidth B of the signal received by the limiter) is considerably lower than the sampling rate Tz−1 used.
Afterward, from the digital signal generated by the sampling, by means of a plurality of filter stages, the higher harmonic components of the signal are eliminated, the signal rate is decimated, and a digital signal equivalent to the GFSK signal is generated by means of a demodulation. The elimination of the higher harmonic components of the signal has to be effected with the high sampling rate Tz−1 and makes high requirements of the filters used in the signal path downstream of the sampling. In practice, complicated filter cascades with interposed decimation stages will be used for the signal reconstruction. A high-power consumption occurs on account of the high sampling rate Tz−1.
The article “Low-Power Design of a Digital FM Demodulator Based on Zero-Cross Detection at IF”, N. Ismailoglu et al., IEEE Vehicular Technology Conference, Sep. 19-22, 1999, pages 810 to 813, discloses a limiter discriminator circuit in which a digital zero crossing detector is arranged in the signal path downstream of the sampling. The zero crossing detector generates a signal specifying the instants of the zero crossings of the signal output by the limiter through generation of a logic “1”. For demodulation of the signal output by the zero crossing detector, use is made of a fourth-order sinc cube decimation filter and a subsequent lowering of the sampling rate by the factor 4.